디지털시스템설계 - 신호등 설계
페이지 정보
작성일 23-03-22 22:29
본문
Download : 디지털시스템설계 - 신호등 설계.hwp
• interval_counter port map ( system_clk, iRst, enable_counter, counter )
레포트 > 공학,기술계열
counter );
U0_clock_divider : clock_divider port map (iMclk, iRst, system_clk );
oTraffic_Light_DOT_D, oTraffic_Light_DOT_COM);
oTraffic_Light_LED );
system_clk, iRst is input and enable_counter, counteris output.
• DOT_divider port map ( iMclk, iRst, light_direction, oTraffic_Light_DOT_D, oTraffic_Light_DOT_COM)
설명
on HBE-COMBO II Kit
light_direction, NUMBER, oTraffic_Light_SEGMENT, oTraffic_Light_common);
U4_LED_divider : LED_divider port map ( system_clk, iRst, iswitch,
VFD_rs, VFD_rw, VFD_D);
Design a practical Traffic Light Controller using Traffic Lights Module
디지털시스템설계,신호등 설계
디지털시스템설계 - 신호등 설계
U2_SEGMENT_divider : SEGMENT_divider port map (iMclk, iRst,
U1_counter : interval_counter port map (system_clk, iRst, enable_counter,
iMclk, iRst is clk_divider input and system_clk is output of clk_divider.
Download : 디지털시스템설계 - 신호등 설계.hwp( 67 )
• SEGMENT_divider port map ( iMclk, iRst, light_direction, NUMBER, oTraffic_Light_SEGMENT, oTraffic_Light_common)
iMclk, iRst, light_direction, NUMBER is input and oTraffic_Light_SEGMENT, oTraffic_Light_common is output.
순서
U5_VFD_divider : VFD_divider port map ( iMclk, iRst, light_direction, VFD_e,
U3_DOT_divider : DOT_divider port map ( iMclk, iRst, light_direction,
• clock_divider port map ( iMclk, iRst, system_clk )
Design a practical Traffic Light Controller using Traffic Lights Module on HBE-COMBO II Kit
begin
다.


